Latency [clock cycles = 25ns steps]
10 11 12 13 14 15 16 17 18 19
LG efficiency
0.0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.0
A, th=-60steps]µ[I=859
Latency scan @ Ar-CO2 70/30
MSPL 4clk | Threshold -40 DAC steps
MSPL 4clk | Threshold -60 DAC steps
MSPL 4clk | Threshold -80 DAC steps
MSPL 4clk | Threshold -100 DAC steps
MSPL 3clk | Threshold -40 DAC steps
MSPL 3clk | Threshold -60 DAC steps
MSPL 3clk | Threshold -80 DAC steps
MSPL 3clk | Threshold -100 DAC steps
MSPL 2clk | Threshold -40 DAC steps
MSPL 2clk | Threshold -60 DAC steps
MSPL 2clk | Threshold -80 DAC steps
MSPL 2clk | Threshold -100 DAC steps
MSPL 1clk | Threshold -40 DAC steps
MSPL 1clk | Threshold -60 DAC steps
MSPL 1clk | Threshold -80 DAC steps
MSPL 1clk | Threshold -100 DAC steps